Series Current Limiter Device

ABSTRACT

Semiconductor protection devices, and related methods and systems, especially devices for providing series current limiting. The device typically comprises two regenerative building blocks and/or MOSFETs connected back-to-back in series, where one of the MOSFETs/Regenerative Building Blocks has an extra voltage probe electrode that provides a regenerative signal with self-limited voltage to the other via coupling to its gate electrode.

CROSS REFERENCE TO OTHER APPLICATIONS

The present application claims priority from U.S. Provisional Application 61/174,865 filed 1 May 2009, which is hereby incorporated by reference.

The present application also claims priority from U.S. patent application Ser. No. 12/683,425 filed 6 Jan. 2010, and therethrough from U.S. Provisional Patent Application 61/142,647 filed 6 Jan. 2009. Both of these are hereby incorporated by reference.

The present application also claims priority from U.S. patent application Ser. No. 12/431,580 filed 28 Apr. 2009, and therethrough from U.S. Provisional Patent Application 61/048,336 filed 28 Apr. 2008. Both of these applications are hereby incorporated by reference.

The present application also claims priority from U.S. patent application Ser. No. 12/359,094 filed 23 Jan. 2009, and therethrough from U.S. Provisional Patent Application 61/022,968 filed 23 Jan. 2008. Both of these applications are hereby incorporated by reference.

The present application also claims priority from U.S. patent application Ser. No. 12/238,308 filed 25 Sep. 2008, and therethrough from U.S. Provisional Patent Application 60/975,467 filed 26 Sep. 2007, and also (through Ser. No. 12/238,308) from U.S. Provisional Patent Application 61/048,336 filed 28 Apr. 2008. All of these applications are hereby incorporated by reference.

BACKGROUND

The present inventions relate generally to semiconductor protection devices, and more specifically to a device for providing series current limiting of sensitive electronics against large currents and voltages during various surge events.

Protection against surge events is an important part of circuit design. The surge events can take the form of either surge currents or voltages and can be caused by lightning, short circuits and various faults in the power systems. The primary protection from these surges is accomplished by circuit breakers, fuses, shunts, and gas discharge tubes (GDT). All of these protection devices have limitations, and electronic circuits still can be damaged by voltages typically in the range of tens to hundreds of volts and currents below one ampere. Thus, a secondary protection is typically accomplished by thyristors. However, the use of thyristors requires a careful design of the coordination between primary and secondary protections.

Even with careful surge coordination, prior art surge protection designs have particular weakness and generally lack reliability. There has been a long-felt need for a simple secondary inline protection device. The primary protection device lets through much smaller amounts of energy, with predictable current and voltage levels. This energy can be blocked by a series secondary protector (in line with the transmission line). Ideally this device should add no more than a small series resistance during regular operation of the circuit.

During a current surge event, the device should block the current above a desired level and be able to withstand the secondary surge voltage. FIG. 1 shows the schematic I-V curve, including all quadrants, for the ideal secondary surge protector operation. Previously in the prior art, transient blocking units were proposed to achieve characteristic performance shown in FIG. 1. A variety of such transient blocking units have been published as U.S. published applications 20080192394, 20060285264, 20060176638, 20060098373, 20060098364, and 20060098363, all of which are hereby incorporated by reference.

FIG. 2 shows such a prior art device made from two MOSFETs as shown (G1, D1 and G2, D2 respectively). Notice that, to operate at small voltages, each MOSFET should possess a small threshold voltage, and therefore a small gate oxide thickness at G1 and G2. In practice, in embodiments designed for handling significant voltage, one cannot apply full drain voltage to the low threshold gate, because the thin gate oxide may be damaged and the device may be destroyed. Therefore, additional circuit elements had to be added in order to overcome the above problems.

SUMMARY

The present application discloses new approaches to an electronic device, referred to hereinafter as a series current limiter (SCL) device, which uses a Regenerative building block (RBB), such as disclosed in U.S. patent application Ser. No. 12/359,094 filed Jan. 23, 2009, which is hereby incorporated by reference. The present inventors have realized that the self-bootstrapping diode described in commonly owned U.S. patent application Ser. No. 12/683,425 provides a very good “lambda device” characteristic in its reverse-bias regime, and that the limiting current density of this reverse-bias regime can be easily adjusted. The present inventors have also realized that, by combining two such devices with opposing polarities, a transient blocking device can be achieved which provides bidirectional lambda device characteristics. Many different embodiments are described.

The disclosed innovations, in various embodiments, provide one or more of at least the following advantages. However, not all of these advantages result from every one of the innovations disclosed, and this list of advantages does not limit the various claimed inventions.

-   -   Greater robustness and reliability.     -   Greater operatively across a wider voltage range.     -   One device can be utilized for current limiting rather than         multiple devices as previously required.

BRIEF DESCRIPTION OF THE DRAWINGS

The disclosed inventions will be described with reference to the accompanying drawings, which show important sample embodiments of the invention and which are incorporated in the specification hereof by reference, wherein:

FIG. 1 shows a schematic I-V curve for an ideal secondary surge protector operation.

FIG. 2 shows an example of a conventional series current limiting (or transient blocking) device made from two MOSFETs.

FIG. 3 shows a schematic for a Series Current Limiter made from two Regenerative Building Blocks.

FIG. 4 shows a Series Current Limiter made from the combination of a P-channel and a N-channel Regenerative Building Block. In this example, the probe electrode of either RBB is connected to the gate electrode of the other, and this configuration provides automatic switching between ON and OFF states.

FIG. 5 shows a schematic for a Series Current Limiter made from the combination of a Regenerative Building Block and a MOSFET.

FIG. 6 is a structural representation of a Series Current Limiter made from the combination of a N-type Regenerative Building Block and a P-type MOSFET.

FIG. 7 is a graph showing the reverse bias with forward voltage drop versus applied current for a Series Current Limiter device, both at 125 C (the upper line) and at 25 C (the lower line).

FIGS. 8A, 8B, 8C, and 8D show four different UMOS realizations of Series Current Limiter devices.

DETAILED DESCRIPTION OF SAMPLE EMBODIMENTS

The numerous innovative teachings of the present application will be described with particular reference to presently preferred embodiments (by way of example, and not of limitation). The present application describes several inventions, and none of the statements below should be taken as limiting the claims generally.

The present application discloses new approaches to an electronic device, referred to hereinafter as a series current limiter (SCL) device, which uses a Regenerative building block (RBB), such as disclosed in U.S. patent application Ser. No. 12/359,094 filed Jan. 23, 2009, which is hereby incorporated by reference. The present inventors have realized that the self-bootstrapping diode described in commonly owned U.S. patent application Ser. No. 12/683,425 provides a very good “lambda device” characteristic in its reverse-bias regime, and that the limiting current density can be easily adjusted. The present inventors have also realized that, by combining two such devices with opposing polarities, a transient blocking device can be achieved which provides bidirectional lambda device characteristics. Many different embodiments are described.

In some embodiments, the device uses two external electrodes to achieve a voltage-current characteristic very close to the ideal one shown on FIG. 1. The use of such an Regenerative Building Block avoids the problems of a large gate signal which can occur in the known structure of FIG. 2.

Internally, the Series Current Limiter device can be built as a regenerative combination of a Regenerative Building Block (RBB) together with another Regenerative Building Block or MOSFET: one of a P-type and the other of the N-type (FIG. 3 and FIG. 5) with both channels normally in the conductive ON state. The regenerative configuration produces the effect that both channels stay in the conductive ON state for increasing applied voltage until one of the regenerative signals reaches the threshold voltage. After that occurs, both regenerative couplings turn both channels into blocking OFF state.

Individually, the devices shown in FIGS. 3 and 5 provide only unidirectional protection, since for the forward bias they act as small resistors. Two such devices connected back-to-back in series will provide bidirectional protection as shown for the ideal device of FIG. 1. Since the series current limiter device has only two contacts and is used for both incoming lines, the complexity of coordination between primary and secondary surge protection is avoided. The use of a voltage probe electrode automatically restricts the maximum voltage on the gate, providing gate protection.

In order to achieve a high limiting current for the transient blocking unit, two kinds of modifications are preferably made to the diode of Ser. No. 12/683,425. Geometric modifications can be made to reduce the voltage change seen at the probe contact when the current through the device increases; for example, in the device structure of FIG. 4, the lateral separation between the prone and source regions can be increased.

In addition, the device parameters can be adjusted so that it is more difficult to switch the active device to its OFF state. For example, in one sample embodiment the “bootstrap” diode of Ser. No. 12/683,425 was modified by doubling the gate oxide thickness (from 50 Å to 100 Å), and by reducing the channel doping by a factor of 6 (changing from an implant of 6×10¹² cm⁻² boron at 30 keV to an implant of 1×10¹² cm⁻² boron at 30 keV). Of course these specific numbers are merely examples of how a particular process was modified, but they do help to show an example of what sort of changes can be useful to optimize the device for use as a transient blocking unit. In general, optimization of the bootstrap diode structure for use as a transient blocking unit should make the diode leaky. The maximum peak current through a diode optimized for transient blocking is preferably several orders of magnitudes larger than that of the same structure optimized for fast reaction and low forward voltage drop.

The present application discloses a new series current limiter (SCL) device, which (in one example) can be viewed in simplified form, as a regenerative combination of two MOSFETs, where one of the MOSFETs has an extra voltage probe electrode that provides a regenerative signal with self-limited voltage that cannot destroy the other gate.

A generalized schematic representation of the internal configuration of one embodiment of Series Current Limiter, comprising a combination of a specially-constructed N-type Regenerative Building Block 310 and a specially-constructed P-type Regenerative Building Block 320, is shown in FIG. 3. The source electrodes S of the two Regenerative Building Blocks (301 and 302) are shorted together. The gate electrode of each Regenerative Building Block, indicated as G1 312 and G2 322, is controlled by a regenerative signal from the probe contact P2 323 (and P1 313) of the other Regenerative Building Block. The drain electrode D2 324 of the N-type Regenerative Building Block G2 322 serves as a cathode K for the Series Current Limiter, and the drain electrode D1 314 of the P-type Regenerative Building Block as an anode A. The cathode and anode are the only external electrodes.

For the forward bias, both P and N channels are open and the device has small resistance. The probe electrode of the Regenerative Building Block provides a low voltage well defined regenerative signal, which is well-suited for the gate electrode of the adjacent device. For the reverse bias, the regenerative voltages above the threshold will close both of the channels. Thus, in terms of black box operation, the device operates as a unidirectional protection device, and can be represented by the symbol shown in FIG. 1, which reflects the ideal protector characteristic.

In one embodiment, the thickness of the gate oxide and the doping in the channel region are carefully managed to optimize device performance. In addition, N++doping in the probe opening is preferred over P++doping in at least some embodiments.

One possible way to manufacture the Regenerative Building Block is described in U.S. patent application Ser. No. 12/359,094 filed Jan. 23, 2009, which is hereby incorporated by reference.

FIG. 4 shows the configuration for one side of a Series Current Limiter, using the combination of a P-channel and an N-channel Regenerative Building Block. Using modifications as described above, the maximum current density of the reverse-biased device can be made usefully large. By using a series combination of two such devices back-to-back, a bidirectional Transient Blocking Unit can be achieved.

In an alternative arrangement, one side of a Series Current Limiter can be also made from a combination of a Regenerative Building Block and a MOSFET.

FIG. 5 shows an embodiment of such a device in schematic form, while FIG. 6 illustrates the structure of such an embodiment of a Series Current Limiter in accordance with a sample innovative embodiment. Using modifications as described above, the maximum current density of the reverse-biased device can be made usefully large. By using a series combination of two such devices back-to-back, a bidirectional Transient Blocking Unit can be achieved.

Using a design like that shown in FIG. 6, the IV curve for reverse bias is shown in FIG. 7. As will be appreciated by those skilled in the art, the Series Current Limiter performance in accordance with the inventions resembles the ideal case. The peak current density at 0.2V is 30 A/cm², which is appropriate to make the protection device. For example, to protect for surge currents above 0.3 A the area is 0.01 cm² and series resistance is only 0.67 ohm.

It can therefore be appreciated that the performance characteristics of an Series Current Limiter device, in accordance with the inventions, approach those of an ideal secondary surge protector and the device of the present inventions does not need the coordination between primary and secondary protection typically required of the prior art devices.

FIGS. 8A-8D illustrate further alternatives of one side of a Series Current Limiter device, using UMOS technology for fabricating the Series Current Limiter device. Using modifications as described above, the reverse-biased device characteristics can be optimized for a Transient Blocking Unit. By using a series combination of two such devices back-to-back, a bidirectional Transient Blocking Unit can be achieved.

The foregoing has described methods and systems for Series Current Limiter circuits that are given for illustration and not for limitation and uses. Thus the inventions are limited only by the appended claims. Although the inventions have been described in accordance with the embodiments shown, one of ordinary skill in the art will readily recognize that there could be variations to the embodiments and those variations would be within the spirit and scope of the present inventions. Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the appended claims.

According to various embodiments, there is provided: A transient current blocking unit, comprising: a pair of self-bootstrapping diodes connected together in series with opposed polarities; wherein each said diode is optimized for a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.

According to various disclosed embodiments, there is provided: A transient current blocking unit, comprising: a pair of diodes connected together in series with opposed polarities; at least one of said diodes comprising a semiconductor device which includes: a first semiconductor channel which electrically separates a first semiconductor source of a first conductivity type from a first drift region, and which is gated by a first gate electrode; a second semiconductor channel which electrically separates a second semiconductor source of a second conductivity type from a second drift region, and which is gated by a second gate electrode; said first and second sources being electrically connected together; a first external terminal, which is operatively connected to receive first-type majority carriers through said first drift region, and a second external terminal, which is operatively connected to receive second-type majority carriers through said second drift region; said first gate electrode being operatively connected to receive a potential which is dependent on the potential of said second drift region, and said second gate electrode being operatively connected to receive a potential which is dependent on the potential of said first drift region; wherein each said diode has a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.

According to various embodiments, there is provided: A method for limiting transient current between two terminals, comprising the actions of: connecting a pair of diodes in series between said terminals, said diodes being connected with opposed polarities; and when a cathode terminal of either said diode is more negative than an anode terminal thereof, then sinking current from said anode terminal through a first drift region and a first field-effect-gated channel to an n-type source, and also sourcing current to said cathode terminal from a p-type source through a second field-effect-gated channel and a second drift region; said n-type and p-type sources being electrically connected together; said second channel being gated by a second gate electrode which is coupled to said first drift region; and said first channel being gated by a first gate electrode which is coupled to said second drift region; wherein each said diode is optimized for a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.

Modifications and Variations

As will be recognized by those skilled in the art, the innovative concepts described in the present application can be modified and varied over a tremendous range of applications, and accordingly the scope of patented subject matter is not limited by any of the specific exemplary teachings given. It is intended to embrace all such alternatives, modifications and variations that fall within the spirit and broad scope of the appended claims.

None of the description in the present application should be read as implying that any particular element, step, or function is an essential element which must be included in the claim scope: THE SCOPE OF PATENTED SUBJECT MATTER IS DEFINED ONLY BY THE ALLOWED CLAIMS. Moreover, none of these claims are intended to invoke paragraph six of 35 USC section 112 unless the exact words “means for” are followed by a participle.

The claims as filed are intended to be as comprehensive as possible, and NO subject matter is intentionally relinquished, dedicated, or abandoned. 

What is claimed is:
 1. A transient current blocking unit, comprising: a pair of self-bootstrapping diodes connected together in series with opposed polarities; wherein each said diode is optimized for a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.
 2. The unit of claim 1, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification.
 3. The unit of claim 1, wherein each said diode includes: a first field-effect transistor structure, having a first semiconductor channel which electrically separates a first semiconductor source of a first conductivity type from a first drift region, and which is gated by a first gate electrode; said first drift region supplying first-type majority carriers both to a first drain structure, and also to a first probe node which is electrically separate from said first drain structure; and a second field-effect transistor structure, having a second semiconductor channel which electrically separates a second semiconductor source of a second conductivity type from a second drift region, and which is gated by a second gate electrode; said second drift region supplying second-type majority carriers at least to a second drain structure; wherein said second gate electrode is connected to said first probe node, and said first gate electrode is connected to be driven by said second drift region; said first and second sources being electrically connected together.
 4. A transient current blocking unit, comprising: a pair of diodes connected together in series with opposed polarities; at least one of said diodes comprising a semiconductor device which includes: a first semiconductor channel which electrically separates a first semiconductor source of a first conductivity type from a first drift region, and which is gated by a first gate electrode; a second semiconductor channel which electrically separates a second semiconductor source of a second conductivity type from a second drift region, and which is gated by a second gate electrode; said first and second sources being electrically connected together; a first external terminal, which is operatively connected to receive first-type majority carriers through said first drift region, and a second external terminal, which is operatively connected to receive second-type majority carriers through said second drift region; said first gate electrode being operatively connected to receive a potential which is dependent on the potential of said second drift region, and said second gate electrode being operatively connected to receive a potential which is dependent on the potential of said first drift region; wherein each said diode has a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.
 5. The unit of claim 4, wherein said first gate electrode is connected to said second external terminal.
 6. The unit of claim 4, wherein said first conductivity type is n-type, and said first-type majority carriers are electrons.
 7. The unit of claim 4, wherein said first gate electrode is connected to said second external terminal, and said second gate electrode is connected to said first external terminal.
 8. The unit of claim 4, wherein said second gate electrode is connected to a first probe node which is fed by said first drift region, and wherein said first probe node is not itself connected to said first external terminal.
 9. The unit of claim 4, wherein said second gate electrode is connected to a first probe node which is fed by said first drift region, and wherein said first probe node is not itself connected to said first external terminal; and wherein said first gate electrode is connected to a second probe node which is fed by said second drift region, and wherein said second probe node is not directly connected to said second external terminal.
 10. The unit of claim 4, wherein said first and second gate electrodes have different respective work function values.
 11. The unit of claim 4, wherein said first and second gate electrodes are made from polycrystalline semiconductor materials with opposite respective doping types.
 12. The unit of claim 4, wherein said first and second channels both have a lateral-DMOS configuration.
 13. The unit of claim 4, wherein said second drift region is substantially lateral, and said first drift region extends vertically downward to a backside drain connection structure.
 14. The unit of claim 4, wherein said first and second gate electrodes are each insulated from said respective channels.
 15. The unit of claim 4, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification.
 16. A method for limiting transient current between two terminals, comprising the actions of: connecting a pair of diodes in series between said terminals, said diodes being connected with opposed polarities; and when a cathode terminal of either said diode is more negative than an anode terminal thereof, then sinking current from said anode terminal through a first drift region and a first field-effect-gated channel to an n-type source, and also sourcing current to said cathode terminal from a p-type source through a second field-effect-gated channel and a second drift region; said n-type and p-type sources being electrically connected together; said second channel being gated by a second gate electrode which is coupled to said first drift region; and said first channel being gated by a first gate electrode which is coupled to said second drift region; wherein each said diode is optimized for a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification.
 17. The method of claim 16, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification.
 18. The method of claim 16, wherein at least one said diode has a maximum current density, under reverse bias, which is more than ten Amperes per square centimeter.
 19. The method of claim 16, wherein each said diode also has a maximum current density, under reverse bias, which is more than one hundred times that which would be present if the diode were optimized for rectification.
 20. The method of claim 16, wherein each said diode also has a leakage current density, under reverse bias, which is more than ten times that which would be present if the diode were optimized for rectification, and has a maximum current density, under reverse bias, which is more than ten times the maximum current density which would occur in said diode if optimized for rectification. 